Integrated circuits, such as bump bonded flip chip integrated circuits, are typically electrically and mechanically housed in a package prior to use in a larger circuit. The package provides several important functions for the integrated circuit. First, the package provides mechanical and structural support to the integrated circuit, and thus protects it from physical damage. Additionally, the substrate, which is the interposer between the integrated circuit and the printed circuit board and forms the base of the package, physically spreads out, or routes, the electrical connections that are made to the integrated circuit on one side of the substrate, so that electrical connections to other parts of the overall circuit, such as to a printed circuit board, can be more easily made on the other side of the substrate.
One type of substrate is fabricated with a relatively rigid sheet of a non-electrically conductive material, called a core, upon which one or more build-up layers are formed, typically on both sides of the core. For example, the core may have electrically conductive layers formed on both of its sides, which are then covered with a non-electrically conductive layer, and then another electrically conductive layer, and so on until the desired number of electrically conductive layers have been formed.
The electrically conductive layers in the substrate are patterned, typically at the time that they are formed, so as to provide specific functions. For example, on an electrically conductive layer on which signals from the integrated circuit are conducted, the layer typically includes a plurality of electrically conductive lines or signal traces, which route the signal from one part of the substrate, such as an inner portion, to a different part of the substrate, such as a more peripheral portion. An electrically conductive layer that provides a ground plane is typically a large, contiguous, electrically conductive sheet. Finally, an electrically conductive layer that provides a power plane typically includes multiple electrically conductive sheets that do not electrically connect one with another, at least not on that same layer.
Electrical connections from one to another of the electrically conductive layers of the substrate are provided by forming holes in the non-electrically conductive layers between them, and either coating or filling the holes with an electrically conductive material. Such structures are called vias. Vias typically must also be formed through the substrate core. These core vias can be formed by mechanical or laser drilling. Because the core is typically much thicker than any of the build-up layers, core vias are often much larger than the vias that extend between the electrically conductive build-up layers.
Unfortunately, the large size of the core vias can present problems when designing a substrate. For example, a standard core for a substrate has electrically conductive layers formed on either side, and core vias drilled through it that connect to, and often align with, signal balls. When the electrically conductive layers formed on the core serve as reference layers, such as power or ground planes, for signals routed on the layers above or below the core, then some clearance has to be provided between the signal core vias and the electrically conductive portions of the reference layers, to ensure that the vias do not short to the reference layer. These clearances are called voids herein, and are formed around the vias on the reference layer. The voids tend to utilize a relatively large amount of space on that layer. However, it is desirable that the signal traces on the routing layer overlying or underlying the reference layer remain predominantly over the conductive portions of the reference layer, and not travel over the voids in the reference layer. When the signal traces travel over the voids, there tend to be problems with inconsistent impendence.
Various solutions have been proposed for this problem of preventing signal traces from routing over voids on their reference planes, including forming the signal traces with narrower widths, or more closely spaced together, so as to be able to fit the signal traces within the small spaces of the reference layer that are left between the voids formed around the core vias. Alternately, the substrate can be made larger so as to increase the amount of room available between the voids for the signal traces. However, these solutions introduce new problems. Signal traces with narrower widths do not conduct the signals as well and tend to have higher resistance. Signal traces that are more closely spaced together tend to have an increase in crosstalk between the signals conducted on the traces. Finally, larger substrates require more space within the circuit in which they are used, which is generally undesirable for most applications.
What is needed, therefore, is a substrate design that provides more usable space for signal trace routing without running signal traces over voids, and without increasing the size of the substrate.